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Build using minimum number of CMOS gates.

  1. Three input NAND gate.
  2. Two input NOR gate
  3. Three input NOR gate
  4. Two input AND gate
  5. Two input OR gate
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  1. Three input NAND gate.
  2. Two input NOR gate
  3. Three input NOR gate
  4. Two input AND gate
  5. Two input OR gate
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