**Description** : A 3 -stage ripple counter has Flip Flop with propagation delay of 25 nsec and pulse width of strobe input 10 nsec. Then the maximum operating frequency at which counter operates reliably is

**Answer** : A 3 -stage ripple counter has Flip Flop with propagation delay of 25 nsec and pulse width of strobe input 10 nsec. Then the maximum operating frequency at which counter operates reliably is 12.67 MHz

**Description** : Define following terms related to logic families : (i) Noise Margin (ii) FAN-OUT (iii) Propagation delay (iv) Power dissipation

**Answer** : i) Noise immunity is measured in terms of noise margin. High state Noise margin = VNH = VOH(min) - VIH(min) Low state Noise margin = VNL = VIL(max) - VOL(max) i) The fan-out is defined as the ... logical 0 state (HIGH to LOW) iii) Average power dissipation is defined as PD(avg) = ICC(avg) * VCC

**Description** :

**Answer** : The delay fuses are used for the protection of motors.

**Description** : Explain ionospheric propagation with neat sketch. Explain two properties of layers of ionosphere.

**Answer** : Diagram : Explanation: The transmitted signal travels into the upper atmosphere where it is reflected back to earth due to the presence of layers called as ionosphere in the upper ... having highest electron density of all layers, due to this F2 layer remains present at night time.

**Description** : The propagation delay in a CMOS inverter is
(A) proportional to (W/L) ratio
(B) inversely proportional to (W/L) ratio
(C) independent of (W/L) ratio
(D) depends only on W

**Answer** : The propagation delay in a CMOS inverter is inversely proportional to (W/L) ratio

**Description** : What are the fundamental requirements of gate drive ICs?

**Description** : What is the purpose of a NAND gate?

**Answer** : Nand gate has 2 inputs and only 1 output and it is equivalent of an and gate. The output of a nand gate is high(1) only when anyone or both inputs are low(0).and the output of nand gate is low(0) only when both the inputs are high(1).nand gate is also called as universal gate.

**Description** : What is an inverter gate?

**Answer** : Not gate is known as inverter gate as it inverts the I/P

**Description** : What does the AND gate do?

**Answer** : AND gate multiple two inputs. If any one input is zero output will be zero if both inputs are one then only output is one.

**Description** : Draw the structural diagram of GTO. Explain briefly the switching behavior of GTO with the help of appropriate voltage and current waveform.

**Answer** : Gate Turn Off Thyristor (GTO) Conventional Thyristor can be turned on with gate terminal but can not turn off from gate terminal. But in case of Gate Turn Off Thyristor (GTO), we can turn it on and off ... subdivided as storage period (Ts), fall period (Tp) and tail period (Tt).

**Description** : What is logic analyser?

**Answer** : Logic analyser is the extension of Oscilloscope. Logic analyser is used for troubleshooting digital circuits. Logic analyser can store digital data and it have 8 to 64 channels. Logic analyser are used for Hardware verification, fault analysis and automated testing.

**Description** : What is Defuzzification in fuzzy logic?

**Description** : What is the membership function in fuzzy logic?

**Description** : What is fuzzy logic algorithms?

**Description** : Function of OR Gate its logical symbol and truth table.

**Answer** : Function: - OR gate is used to perform logical addition. So used in adder subtractor and logic circuits where logical Oring is required. Used to implement SOP form equations. Also used in PLA logic. Logical symbol of OR gate :- Truth table:-

**Description** : GATE 2020 syllabus electrical engineering

**Answer** : EE: Electrical Engineering Section 1: Engineering Mathematics Linear Algebra: Matrix Algebra, Systems of linear equations, Eigenvalues, Eigenvectors. Calculus: Mean value theorems, Theorems of ... to dc converters, Single phase and three phase inverters, Sinusoidal pulse width modulation.

**Description** : Sketch symbol of NAND gate and NOR gate.

**Answer** : Symbol of NAND gate and NOR gate

**Description** : Explain different gate drives techniques with base circuits and key features.

**Description** : Explain MOSFET gate drive circuit and totem pole configuration.

**Answer** : MOSFET gate drive circuit: The turning on and turning off of MOSFET can be controlled from gate to source voltage signal. If the gate to source voltage of MOSFET exceeds threshold ... this configuration, the two switches (transistors) are used in totem pole arrangement with a comparator.

**Description** : Explain thyristor gate drive circuit.

**Answer** : Thyristor Gate Drive Circuit: The thyristor can be turned on by pulse voltage signal at gate terminal and it does not require continuous drive signal like the transistor. The gate ... circuit provide required minimum gate voltage and gate current then the thyristor conducts properly.

**Description** : Justify. Power MOSFET is operated at high enough gate source voltage to minimize the conduction losses.

**Answer** : MOSFET is metal oxide field effect transistor. MOSFET is a voltage controlled device. MOSFET is majority carrier device. MOSFET are of two one is n-channel MOSFET and p-channel MOSFET. Gate, ... . Hence, power MOSFET is operated at high enough gate-source voltage to minimize the conduction losses.

**Description** : block diagram of logic analyzer.

**Answer** : A logic analyzer can be triggered on a complicated sequence of digital events, then capture a large amount of digital data from the system under test (SUT).When logic analysers first came ... Once the data are captured, they can be displayed several ways, from the simple) to the complex

**Description** : application of logic analyzer.

**Answer** : Digital systems. Computer systems Logic circuits. Testing complex digital

**Description** : Compare combinational logic circuit and sequential logic circuit

**Answer** : Combinational logic Sequential logic The combinational logic circuit consists of logic gate only Sequential logic circuit consists of combinational logic circuit along with memory for storage of ... , multiplexer, demultiplexer etc E.g. counters, shift registers flip-flop etc

**Description** : Design Y=AB.CD using CMOS logic.

**Answer** : Y=AB.CD using CMOS logic

**Description** : Synchronous vs asynchronous logic

**Answer** : .embed-container { position: relative; padding-bottom: 56.25%; height: 0; overflow: hidden; max-width: 100%; } .embed-container iframe, .embed-container object, .embed-container embed { position: absolute; top: 0; left: 0; width: 100%; height: 100%; }

**Description** : Logic Simplification Using Boolean Algebra

**Answer** : Logic Simplification Using Boolean Algebra 1 : https://youtu.be/fuoSMm2dJMc Logic Simplification Using Boolean Algebra 2 : https://youtu.be/bfCdur2QcJ4 Logic Simplification Using Boolean Algebra 3 : ... .be/V02wz8gz1UU Logic Simplification Using Boolean Algebra 7 : https://youtu.be/rgnJKgFO-SU

**Description** : Which of the following gates can be used to realize all possible combinational logic functions?
(i) OR gate (ii) NOR gate (iii) Exclusive OR gate (iv) NAND gate (v) AND gate
(A) (iii), (iv) and (v)
(B) (i), (iii) and (iv)
(C) (ii) and (iv)
(D) (i) and (v)

**Answer** : Which of the following gates can be used to realize all possible combinational logic functions? (i) OR gate (ii) NOR gate (iii) Exclusive OR gate (iv) NAND gate (v) AND gate (A) (iii), (iv) and (v) (B) (i), (iii) and (iv) (C) (ii) and (iv) (D) (i) and (v)

**Description** : The following logic families have their propagation delay. Arrange them from lowest
propagation delay to highest propagation delay.
1. TTL (Standard)
2. ECL
3. Low power CMOS
4. DTL
(A) 2, 1, 4 and 3 (B) 2, 4, 1 and 3 (C) 4, 2, 3 and 1 (D) 1, 2, 3 and 4

**Answer** : The following logic families have their propagation delay. Arrange them from lowest propagation delay to highest propagation delay. 1. TTL (Standard) 2. ECL 3. Low power CMOS 4. DTL (A) 2, 1, 4 and 3 (B) 2, 4, 1 and 3 (C) 4, 2, 3 and 1 (D) 1, 2, 3 and 4

**Description** : Shaquille O’ Neal is a 60% career free throw shooter, meaning that he successfully makes 60 free throws out of 100 attempts on average. What is the probability that he will successfully make exactly 6 free throws in 10 attempts?
(A) 0.2508 (B) 0.2816
(C) 0.2934 (D) 0.6000

**Answer** : Correct option is (A).

**Description** : Sourya committee had proposed the establishment of sourya institutes of Technology (SITs) in line with Indian Institutes of Technology (IITs) to cater to the
technological and industrial needs of a developing country Which of the following can be logically inferred from the above sentence?
Based on the proposal,
(i) In the initial years, SIT students will get degrees from IIT.
(ii) SITs will have a distinct national objective.
(iii) SITs like institutions can only be established in consultation with IIT.
(iv) SITs will serve technological needs of a developing country.
(A) (iii) and (iv) only (B) (i) and (iv) only
(C) (ii) and (iv) only (D) (ii) and (iii) only

**Answer** : Correct option is (C). Option (i) and (iii) state phrases like ‘in the initial years’ and ‘SIT like institutions can only be established in consultation with IIT’ cannot be logically inferred so (ii) and (iv) are the best inferences i.e. option (C)

**Description** : A poll of students appearing for masters in engineering indicating that 60% of the students believed that mechanical engineering is a profession unsuitable for women. A research study on women with master or higher degrees in mechanical engineering found that 90% of such women were successful in their professions. Which of the following can be logically inferred from the above paragraph?
(A) Many students have misconceptions regarding various engineering disciplines. (B) Men with advanced degrees in mechanical engineering believe women are well suited to be mechanical engineers. (C) Mechanical engineering is a profession well suited for women with masters or higher degrees in mechanical engineering. (D) The number of women pursing higher degrees in mechanical engineering is small.

**Answer** : Correct option is (C). A poll says that women with masters or higher degrees in mechanical engineers are successful in their professions. This statement leads to the option (C) which is the best inference

**Description** :

The following graph represents the installed capacity for cement production (in tonnes) and the actual production (in tonnes) of nine cement plants of a cement company. Capacity utilization of a plant is defined as ratio of actual production of cement to installed capacity. A plant with installed capacity of at least 200 tonnes is called a large plant and a plant with lesser capacity is called a small plant. The difference between total production of large plants and small plants, in tonnes is _____

**Answer** : Correct answer is 120.

**Description** :

........

**Answer** : Correct option is (C).

...