Simple Programmable Logic Devices
•There are three main types of SPLD architecture Programmable Logic Array (PLA), Programmable Array Logic (PAL) and Generic Array Logic (GAL).
•SPLD is made from macro cell each cell made from AND-OR structure based on the AND array feeding into OR array.
•PLA have four input and four output.
•PLA can not be reconfigured.
•PLA is One Time Programmable (OTP).
•PAL is simpler than PLA architecture.
•PAL have faster designing.
•PAL have have 20 to 24 pins.
•PAL have low propagation delay of about 5 ns.
•PAL is One Time Programmable (OTP).
•PAL can not be reconfigured.
•GAL uses EEPROM configuration so it can be reconfigured.